SPP 2253:  Nano Security: From Nano-Electronics to Secure Systems

• Subject Area: Computer Science, Systems and Electrical Engineering ; Physics
• Term: since 2020
• Project identifier: Deutsche Forschungsgemeinschaft (DFG) - Project number 422730034

No abstract available

• DFG Programme: Priority Programmes

Projects

• Bio-Nanoelectronic based Logic Locking for Secure Systems [BioNanoLock] (Applicants Leupers, Ph.D., Rainer ;  Pachauri, Vivek )
• CMOS-compatible RRAM-based structures for the implementation of Physical Unclonable Functions (PUF) and True Random Number Generators (TRNG) (Applicant Mussenbrock, Thomas )
• Coordination Funds (Applicant Polian, Ilia )
• EMBOSOM - Emigrating Embedded Software Security into Modern Emerging Hardware Paradigms (Applicants Drechsler, Rolf ;  Güneysu, Tim Erhan ;  Lüth, Christoph ;  Sasdrich, Pascal )
• Exploration of an integrated Strain-based TAMPer Sensor for Puf and trng concepts with best-in-class Leakage resilience and robUStness (STAMPS-PLUS) (Applicants Brederlow, Ralf ;  Hiller, Matthias ;  Pehl, Michael )
• HaSPro: Verifiable Hardware Security for Out-of-Order Processors - Phase 2 (Applicants Eisenbarth, Thomas ;  Kunz, Wolfgang )
• Intrinsic Physical Unclonable Functions from Emerging Non-Volatile Memories (Applicants Arul, Tolga ;  Katzenbeisser, Stefan )
• nanoEBeam - E Beam Probing for backside attacks against nanoscale ICs (Applicants Brand, Sebastian ;  Seifert, Jean-Pierre )
• Nanomaterial-based platform electronics for PUF circuits with extended entropy sources (Applicants Hermann, Sascha ;  Katzenbeisser, Stefan ;  Kavun, Ph.D., Elif Bilge )
• OnE-Secure: Securing State-of-the-Art Chips Against High-Resolution Contactless Optical and Electron-Beam Probing Attacks (Applicants Brand, Sebastian ;  Drechsler, Rolf ;  Seifert, Jean-Pierre ;  Sill Torres, Frank )
• OptiSecure – Securing Nano-Circuits against Optical Probing (Applicants Drechsler, Rolf ;  Seifert, Jean-Pierre ;  Sill Torres, Frank )
• RAINCOAT II: Randomization in Secure Nano-Scale Microarchitectures 2 (Applicants Davi, Lucas ;  Güneysu, Tim Erhan )
• Secure Mixed-Signal Neural Networks - SeMSiNN (Applicants Ortmanns, Maurits ;  Polian, Ilia )
• SecuReFET II: Secure Circuits through inherent Reconfigurable FET II (Applicants Kumar, Akash ;  Mikolajick, Thomas )
• SSIMA – Scalable Side-Channel Immune Micro-Architecture (Applicant Moradi, Amir )
• Towards Secure Electroforming-free Memristive Cryptographic Implementations (MemCrypto) (Applicants Du, Ph.D., Nan ;  Polian, Ilia )

• Spokesperson: Professor Dr. Ilia Polian