NSF-DFG: SaTC: Core: Small: A Unified Hardware Design for the USA and German Post-Quantum Standards

• Applicant: Professorin Dr.-Ing. Elif Bilge Kavun, Ph.D.
• Subject Area: Security and Dependability, Operating-, Communication- and Distributed Systems ; Electronic Semiconductors, Components and Circuits, Integrated Systems, Sensor Technology, Theoretical Electrical Engineering ; Computer Architecture, Embedded and Massively Parallel Systems
• Term: since 2024
• Project identifier: Deutsche Forschungsgemeinschaft (DFG) - Project number 543352068

Quantum-safe cryptographic algorithms (a.k.a., post-quantum cryptosystems) are being developed and standardized globally for mass-scale adoption. Unfortunately, different countries may recommend or follow different standard algorithms. For example, in the US, the National Institute of Science and Technology (NIST) has recently announced the CRYSTALS-Kyber algorithm to be the standard for key-encapsulation mechanism protocols, whereas, in Germany, the Federal Office for Information Security (Bundesamt für Sicherheit in der Informationstechnik: BSI) is recommending the use of FrodoKEM algorithm to the same end. This creates a big problem for hardware accelerator designs that aim to support post-quantum cryptography because such hardware is custom-designed for a single algorithm. Using separate hardware to support both algorithms will lead to an inefficient solution and restrict adoption in constrained environments. The primary research objective of this project is to develop a custom, unified hardware accelerator that can "efficiently" support both German- and USA-recommended post-quantum key encapsulation mechanisms. This is a non-trivial research task that requires novel algorithm design for joint arithmetic operations, rearchitecting the system for improved operational support and memory access schemes, and custom hardware support for unified components. Another objective of the project is to investigate and enhance the implementation security of the resulting hardware. This includes exposing side-channel risks that can leak information about secret keys via power consumption or execution time and addressing the leakage with novel hardware defenses. We will conduct the proposed research in four major steps: (i) analyzing the arithmetic needs and developing novel algorithms for operations in FrodoKEM and CRYSTALS-Kyber, (ii) designing a joint architecture containing unified elements, (iii) implementing the unified hardware circuits, (iv) analyzing and addressing side-channel vulnerabilities via hardware masking. The circuit designs will be split equally among US and German researchers and they will collaborate for a tight integration of the final hardware.

• DFG Programme: Research Grants
• International Connection: USA
• Cooperation Partner: Professor Aydin Aysu, Ph.D.