Secure Sharing of FPGAs in Clouds (SecFShare)

• Applicants: Professor Dr.-Ing. Thomas Eisenbarth; Professor Dr. Amir Moradi; Professor Mehdi B. Tahoori, Ph.D.
• Subject Area: Security and Dependability, Operating-, Communication- and Distributed Systems
• Term: from 2021 to 2024
• Project identifier: Deutsche Forschungsgemeinschaft (DFG) - Project number 456967092

FPGAs are becoming increasingly popular as flexible re-programmable accelerators in the cloud for server applications such as Artificial Intelligence (AI), big data analytics or online searches. To empower these new applications and new usage mechanisms in the cloud, FPGA vendors are integrating FPGAs ever more tightly with existing software and CPU infrastructure to enable easy and efficient exchange of large amounts of data. Cloud service providers now offer FPGAs for rent on their shared server platforms.The tight integration of FPGAs into classic CPU-based systems in the cloud infrastructure leads to an increasing level of platform sharing. Yet, right now, FPGAs are not shared due to security concerns. Shared FPGA-powered services and true FPGA multi-tenancy--which are normal in the server world--are highly desirable features, as sharing can provide the maximum flexibility, performance and yet reduced costs. Exploring technology to allow secure sharing of FPGAs is thus essential for FPGA technology as it becomes more tightly coupled into CPU systemsThe goal of this project is to provide new security mechanisms to enable secure FPGA sharing in the could. We will investigate security challenges and countermeasures for combined CPU and FPGA platforms where both the FPGA and CPU may be shared by numerous processes and users remotely. We propose a rigorous analysis of the new combined architecture with respect to novel risks that stem from the close coupling of the FPGA and CPU platform and their shared operation at electrical, logical and microarchitectural levels. We will investigate new countermeasures, with a combination of static checking and dynamic detection and protection, to mitigate these security threats, at both electrical and logical levels. This project will have a transformative impact on the entire reconfigurable hardware and microarchitecture security community and pave the way toward flexible and secure sharing of combined FPGA CPU systems in the cloud. As a team with complementing skills, we will pioneer this emerging area of hardware security at a critical time of deployment.

• DFG Programme: Research Grants
• International Connection: Austria
• Cooperation Partner: Professor Dr. Daniel Gruss