Design of efficient, dependable VLSI architectures based on a cross-layer-reliability approach using wireless communication as application

• Applicant: Professor Dr.-Ing. Norbert Wehn
• Subject Area: Computer Architecture, Embedded and Massively Parallel Systems ; Electronic Semiconductors, Components and Circuits, Integrated Systems, Sensor Technology, Theoretical Electrical Engineering
• Term: from 2010 to 2018
• Project identifier: Deutsche Forschungsgemeinschaft (DFG) - Project number 181595864

Continued progressive downscaling of CMOS technologies threatens the chip reliability of future embedded systems. Ensuring reliable hardware components with worst case methods and low level techniques will no longer be feasible. Exploring knowledge of multiple layers from micro-architecture to application (cross-layer design) becomes mandatory. This proposal targets the development of a methodology for designing dependable systems by exploiting the mutual trade-offs of system performance, hardware reliability and implementation complexity. Wireless communication is selected as application example for this approach. Scientific research will be carried out in the following fields: investigation of lightweight, adaptive, built-in error-resilience techniques by exploiting algorithmic error robustness; exploration of the interrelation between error resilience on building block and on system level by exploiting the current system state and at runtime-changing quality-of-service requirements; development of a controller paradigm operating in the three dimensions of the optimization space at runtime, i.e., system performance, reliability, and energy efficiency. The overall goal of our intended approach is to minimize the overhead in terms of area and especially energy consumption. This is achieved by recovering only from errors that have a significant impact on the system output and by choosing the layer in which the treatment of the error results in the least overhead.

• DFG Programme: Priority Programmes
• Subproject of: SPP 1500: Design and Architectures of Dependable Embedded Systems