Joint Logic, Memory, and Routing Synthesis (B05)

• Subject Area: Electronic Semiconductors, Components and Circuits, Integrated Systems, Sensor Technology, Theoretical Electrical Engineering
• Term: since 2025
• Project identifier: Deutsche Forschungsgemeinschaft (DFG) - Project number 528378584

No abstract available

• DFG Programme: CRC/Transregios
• Subproject of: TRR 404: Next Generation Electronics with Active Devices in Three Dimensions (Active-3D)
• Applicant Institution: Technische Universität Dresden
• Co-Applicant Institution: Rheinisch-Westfälische Technische Hochschule Aachen
• Project Heads: Professor Dr.-Ing. Tobias Gemmeke; Professor Dr. Akash Kumar