Analog Vector-Matrix Multiplication as a Safe Channel for Security Applications (AVMMSafe)

• Applicants: Professor Dr.-Ing. Thomas Mussenbrock; Privatdozent Dr.-Ing. Eduardo Pérez
• Subject Area: Hardware Systems and Architectures for Information Technology and Artificial Intelligence, Quantum Engineering Systems ; Electronic Semiconductors, Components and Circuits, Integrated Systems, Sensor Technology, Theoretical Electrical Engineering ; Security and Dependability, Operating-, Communication- and Distributed Systems
• Term: since 2025
• Project identifier: Deutsche Forschungsgemeinschaft (DFG) - Project number 546680029

Within AVMMSafe, our primary objective is to explore the potential of analog vector-matrix multiplication identities for enabling lightweight authentication of sensing nodes. This entails utilizing the analog multiplication process of input vectors, which includes both hardware and software-based fingerprints obtained from the RRAM hardware platform used for computation at the nodes. Our proposed approach involves designing a unique architecture to implement hardware security modules within RRAM crossbar structures. The aim is to restrict access to authorized users possessing the correct device, thus ensuring the secure operation of the edge computing system. To achieve this, AVMMSafe will focus on implementing and simulating novel intrinsic designs of Physical Unclonable Functions (PUFs) as vector-matrix multiplication units. Additionally, we will thoroughly examine the security vulnerabilities associated with this approach, assessing various attack scenarios. Our ultimate goal is to propose suitable countermeasures to address any identified weaknesses and enhance the overall security of the system. AVMMSafe involves interdisciplinary research covering four areas: device fabrication, experimental (material properties and electrical) characterization, modeling and simulation, and statistical analysis. This is the required approach in order to achieve our main three targets: i) to integrate the functionality of a physical model into a compact lumped model of memristive devices, supported by rigorous experimental measurements, ii) to design and construct a tunable PUF utilizing a 16x16 array of memristive devices, specifically tailored for Vector Matrix Multiplication (VMM) challenges in hardware security applications, iii) to assess the robustness and security of VMM operations by subjecting the implemented system to various attack scenarios, ensuring its resilience and reliability for secure computing environments, and iv) to check the possibility and practicality of combining PUF and TRNG within a single crossbar architecture.

• DFG Programme: Research Grants