Design of REliable edge neuromorphic system based on SPINtronics for GREEN AI

• Applicant: Professor Mehdi B. Tahoori, Ph.D.
• Subject Area: Computer Architecture, Embedded and Massively Parallel Systems ; Electronic Semiconductors, Components and Circuits, Integrated Systems, Sensor Technology, Theoretical Electrical Engineering
• Term: since 2024
• Project identifier: Deutsche Forschungsgemeinschaft (DFG) - Project number 545614777

Shifting AI inference and training processes from current cloud-based infrastructures towards embedded architectures poses severe challenges, notably in terms of energy efficiency, smaller area needs, reconfigurability, high prediction accuracy and output explainability. Conventional neural network hardware implementations are not able to effectively estimate the uncertainty of their predictions, leading to overconfident results. Estimating uncertainty is crucial for safetycritical applications such as those deployed in autonomous vehicle driving or in medical diagnosis and treatment applications. Bayesian Neural Networks are effective approaches for uncertainty estimation. However, they are computationally demanding, very energy hungry and necessitate substantial memory resources. Computation-inmemory (CiM) architectures utilizing emerging resistive non-volatile memories such as spintronic devices help dealing with these challenges but their realistic hardware implementation comes with its own challenges. This project aims at designing highly accurate Bayesian Neural Networks with extremely low energy consumption and area footprint. Indeed, the goals of the project are - to develop and deploy innovative spintronic device solutions, - to build up new low-cost circuit designs and architectures codesigned with adapted Bayesian algorithms ready for edge applications. In fact as the envisioned implementation remains a serious challenge due to multiple limitations of the emerging technologies, in particular dealing with stochasticity and variabilities, the new architecture is able to take advantage of them rather than fixing them, which is the current design process. Finally, we also propose novel on-chip testability and reliability improvement solutions to support better adoption of the emerging technologies in scalable architectures which includes inherently stochastic components. Last but not least, beyond the multidisciplinary research on advanced embedded hardware and software architectures for AI, our objective is also to create a strong European partnership between two high-level research centers and universities, recognized at the international level.

• DFG Programme: Research Grants
• International Connection: France
• Partner Organisation: Agence Nationale de la Recherche / The French National Research Agency
• Cooperation Partner: Professorin Lorena Anghel, Ph.D.