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VaST - Validation of Software Transactional Memory

Subject Area Software Engineering and Programming Languages
Term from 2017 to 2022
Project identifier Deutsche Forschungsgemeinschaft (DFG) - Project number 362038437
 
Final Report Year 2021

Final Report Abstract

Software transactional memory (STM) algorithms are designed for the purpose of supporting software developers in parallel programming. STMs provide a high-level synchronisation mechanism for parallel access to shared state. Today, numerous proposals for such algorithms exist. They typically allow for a high degree of concurrency while guaranteeing some form of serializability very much alike that of database transactions. The form of serializability most often employed for STMs is opacity. The objective of the project was the development of validation methods for checking a given Software Transactional Memory algorithm for opacity. These methods comprise model checking and testing techniques for a set of fixed transactions as well as mechanized verification of algorithms based on refinement using theorem provers KIV and Isabelle. The techniques have been applied to a number of STMs including NORec, FastLane, TML and RingSTM. A central result of the project furthermore concerns the decidability and complexity of opacity itself which has been shown to be NP-complete for the membership and decidable for the correctness problem.

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