Fundamental challenges and potential solutions for THz SiGeC heterojunction bipolar transistors

• Applicants: Dr. Bernd Heinemann; Professor Dr.-Ing. Michael Schröter
• Subject Area: Electronic Semiconductors, Components and Circuits, Integrated Systems, Sensor Technology, Theoretical Electrical Engineering
• Term: from 2014 to 2019
• Project identifier: Deutsche Forschungsgemeinschaft (DFG) - Project number 242702231

With the latest achievements in heterojunction bipolar transistor (HBT) high-frequency performance, there has been increased interest in utilizing the frequency spectrum within the THz gap (300GHz to 30THz) for a large variety of applications. It has also been predicted most recently that silicon-germanium-carbon (SiGeC) HBTs should be capable of peak power gain (i.e. maximum oscillation) frequencies fmax up to 2THz. These findings in conjunction with lower fabrication cost and higher on-chip integration levels, especially directly with CMOS, appear to favor SiGeC HBTs at least for commercial purposes. However, the predictions did not specify the process solutions that are required to advance from the present state-of-the-art performance (fmax = 500GHz) to the physical limit. The objective of this project is, therefore, the investigation of fundamental roadblocks for achieving the ultimate performance potential of SiGeC HBT technology. The proposed research on high-speed npn transistors addresses the following issues: (i) Investigation of vertical and lateral device architecture options for achieving a balanced THz performance while keeping in mind the practical implementation (such as minimizing the collector current density at peak high-frequency performance). (ii) Calibration of physical models for carrier transport simulation on measured data from very advanced vertical structures fabricated in this project. (iii) Identification of potential roadblocks for developing future SiGeC HBT process technologies. (iv) Evaluation of the suitability of the presently most advanced compact SiGeC HBT model formulations for the fabricated structures. Both transistors and selected benchmark circuits will be used to study the impact of process variants on electrical performance. The two project partners (Chair for Electron Device and Integrated Circuits at TU Dresden and Innovations for High Performance (IHP) at Frankfurt/Oder) will work closely together on device fabrication, electrical characterization, and device modeling.

• DFG Programme: Research Grants