GALS Methodology for Substrate Noise Reduction in BiCMOS technologies- GASEBO

• Applicant: Professor Dr.-Ing. Rolf Kraemer
• Subject Area: Electronic Semiconductors, Components and Circuits, Integrated Systems, Sensor Technology, Theoretical Electrical Engineering
• Term: from 2013 to 2019
• Project identifier: Deutsche Forschungsgemeinschaft (DFG) - Project number 242241487

Noise generated by simultaneous switching of digital components in a system causes various detrimental effects, leading to performance loss, integration problems and malfunction of the system blocks. One of the most important challenges is the substrate noise affecting complex mixed signal designs. In GASEBO project we will investigate the mathematical model, methodology, algorithms, and architectures for substrate noise reduction using the globally asynchronous locally synchronous (GALS) approach for digital- and mixed-mode- systems implemented in BiCMOS technologies. The complete substrate noise model caused by the transistor switching and GALS methodology for reduction will be confirmed on the theoretical level and in simulations. Additionally, the validation will be performed on silicon using the realistic mixed signal application as design case.

• DFG Programme: Research Grants
• Participating Person: Professor Dr.-Ing. Milos Krstic